 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| data sheet v1.4 2014-05 microcontrollers XMC1200 microcontroller series for industrial applications xmc1000 family arm ? cortex ? -m0 32-bit processor core
edition 2014-05 published by infineon technologies ag 81726 munich, germany ? 2014 infineon technologies ag all rights reserved. legal disclaimer the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any ex amples or hints given herein, any typi cal values stated herein and/or any information regarding the application of the device, infi neon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies components may be used in life-suppo rt devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered. data sheet v1.4 2014-05 microcontrollers XMC1200 microcontroller series for industrial applications xmc1000 family arm ? cortex ? -m0 32-bit processor core XMC1200 xmc1000 family data sheet v1.4, 2014-05 trademarks c166?, tricore? and dave? are trademarks of infineon technologies ag. arm ? , arm powered ? and amba ? are registered tradema rks of arm, limited. cortex?, coresight?, etm?, embedded trace macrocell? and embedded trace buffer? are trademarks of arm, limited. XMC1200 data sheet revision history: v1.4 2014-05 previous version: v1.3 page subjects page 11 adc channels of table 2 is updated. table 3 is added. page 12 description for chip identification number of section 1.4 is updated. page 10 a new variant XMC1200-t038 is included in table 1, table 2 and table 4. page 20 the pad type is corrected for p1.6 in table 6. page 32 the t c12 , f c12 , t c10 , f c10 , t c8 and f c8 parameters are updated in table 12. page 35 figure 9 is added. page 38 the t sr and t tsal parameters are updated in table 15. page 41 parameter name for t pser is updated. the n wsflash parameter and test condition for t ret are added to table 18. page 44 the min value for v ddpbo parameter is added to table 20. footnote 1 is updated. page 46 the f ltt parameter is added to table 21. page 47 figure 15 is added. we listen to your comments is there any information in this document that you feel is wrong, unclear or missing? your feedback will help us to continuousl y improve the quality of this document. please send your proposal (including a reference to this document) to: mcdocu.comments@infineon.com subject to agreement on the use of product information XMC1200 xmc1000 family table of contents data sheet 5 v1.4, 2014-05 1 summary of features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.1 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.2 device types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.3 device type features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1.4 chip identification number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2 general device information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.1 logic symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.2 pin configuration and definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.2.1 package pin summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.2.2 port i/o functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3 electrical parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.1 general parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.1.1 parameter interpretati on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.1.2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.1.3 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.2 dc parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.2.1 input/output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.2.2 analog to digital converters (adc) . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3.2.3 out of range comparator (orc) characteristics . . . . . . . . . . . . . . . . . 36 3.2.4 analog comparator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 3.2.5 temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 38 3.2.6 power supply current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 3.2.7 flash memory parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 3.3 ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 3.3.1 testing waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 3.3.2 output rise/fall times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 3.3.3 power-up and supply threshold charcteristics . . . . . . . . . . . . . . . . . . 44 3.3.4 on-chip oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 3.3.5 serial wire debug port (sw-dp) timing . . . . . . . . . . . . . . . . . . . . . . . 48 3.3.6 spd timing requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 3.3.7 peripheral timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 3.3.7.1 synchronous serial interface (usic ssc) timing . . . . . . . . . . . . . . 50 3.3.7.2 inter-ic (iic) interface timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 3.3.7.3 inter-ic sound (iis) interface timing . . . . . . . . . . . . . . . . . . . . . . . . 55 4 package and reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 4.1 package parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 4.1.1 thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 4.2 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 table of contents subject to agreement on the use of product information XMC1200 xmc1000 family table of contents data sheet 6 v1.4, 2014-05 5 quality declaration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 subject to agreement on the use of product information XMC1200 xmc1000 family about this document data sheet 7 v1.4, 2014-05 about this document this data sheet is addressed to embedded hardware and software developers. it provides the reader with detailed description s about the ordering designations, available features, electrical and physical characte ristics of the XMC1200 series devices. the document describes the characteristi cs of a superset of the XMC1200 series devices. for simplicity, the various device types are referred to by the collective term XMC1200 throughout this document. xmc1000 family user documentation the set of user documentation includes: ? reference manual ? decribes the functionality of the superset of devices. ? data sheets ? list the complete ordering designations, available features and electrical characteristics of derivative devices. ? errata sheets ? list deviations from the specifications given in the related reference manual or data sheets. errata sheets are provided for the superset of devices. attention: please consult all parts of the documentation set to attain consolidated knowledge about your device. application related guidance is provided by users guides and application notes . please refer to http://www.infineon.com/xmc1000 to get access to the latest versions of those documents. subject to agreement on the use of product information XMC1200 xmc1000 family summary of features data sheet 8 v1.4, 2014-05 1 summary of features the XMC1200 devices are members of the xm c1000 family of microcontrollers based on the arm cortex-m0 processor core. the XMC1200 series devices are optimized for led lighting and human-machine interface (hmi) applications. figure 1 system block diagram cpu subsystem ?cpu core ? high performance 32-bit arm cortex-m0 cpu ? most of 16-bit thumb instruction set ? subset of 32-bit thumb2 instruction set cortex -m0 cpu 16k sram 200k + 0.5k 1) flash 8k rom prng ahb-lite bus 16-bit apb bus memories scu wdt ports flash sfrs rtc debug system spd swd 1) 0.5kbytes of sector 0 (readable only ). evr temperature sensor 2 x dco analog system ahb to apb bridge pau anactrl sfrs nvic ccu40 usic0 vadc eru0 acmp & orc bccu0 ledts0 ledts1 subject to agreement on the use of product information XMC1200 xmc1000 family summary of features data sheet 9 v1.4, 2014-05 ? high code density with 32-bit performance ? single cycle 32-bit hardware multiplier ? system timer (systick) fo r operating system support ? ultra low power consumption ? nested vectored interr upt controller (nvic) ? event request unit (eru) for programmab le processing of external and internal service requests on-chip memories ? 8 kbytes on-chip rom ? 16 kbytes on-chip high-speed sram ? up to 200 kbytes on-chip flash program and data memory communication peripherals ? two universal serial interface channels (usic), usable as uart, double-spi, quad-spi, iic, iis and lin interfaces ? led and touch-sense controller (ledts) for human-machine interface analog frontend peripherals ? a/d converters, up to 12 channels, includes 2 sample and hold stages and a fast 12- bit analog to digital converter with adjustable gain ? up to 8 channels of out of range comparators (orc) ? up to 3 fast analog comparators (acmp) ? temperature sensor (tse) industrial control peripherals ? capture/compare units 4 (ccu4) for use as general purpose timers ? brightness and colour control unit (bccu) , for led color and dimming application system control ? window watchdog timer (wdt) for safety sensitive applications ? real time clock module with alarm support (rtc) ? system control unit (scu) for system configuration and control ? pseudo random number generator (prn g), provides random data with fast generation times input/output lines ? programmable port driver control module (ports) ? individual bit addressability ? tri-stated in input mode subject to agreement on the use of product information XMC1200 xmc1000 family summary of features data sheet 10 v1.4, 2014-05 ? push/pull or open drain output mode ? configurable pad hysteresis on-chip debug support ? support for debug features: 4 breakpoints, 2 watchpoints ? various interfaces: arm serial wire debug (swd), single pin debug (spd) 1.1 ordering information the ordering code for an infineon microcontroller provides an exact reference to a specific product. the code ?xmc1< ddd>- XMC1200 xmc1000 family summary of features data sheet 11 v1.4, 2014-05 1.3 device type features the following table lists the avai lable features per device type. XMC1200-t038f0200 pg-tssop-38-9 200 16 xmc1202-t028x0016 pg-tssop-28-16 16 16 xmc1202-t028x0032 pg-tssop-28-16 32 16 xmc1202-t016x0016 pg-tssop-16-8 16 16 xmc1202-t016x0032 pg-tssop-16-8 32 16 xmc1202-q024x0016 pg-vqfn-24-19 16 16 xmc1202-q024x0032 pg-vqfn-24-19 32 16 xmc1201-q040f0016 pg-vqfn-40-13 16 16 xmc1201-q040f0032 pg-vqfn-40-13 32 16 xmc1201-q040f0064 pg-vqfn-40-13 64 16 xmc1201-q040f0128 pg-vqfn-40-13 128 16 xmc1201-q040f0200 pg-vqfn-40-13 200 16 xmc1202-q040x0016 pg-vqfn-40-13 16 16 xmc1202-q040x0032 pg-vqfn-40-13 32 16 table 2 features of XMC1200 device types 1) 1) features that are not included in this table are available in all the derivatives derivative adc channel acmp bccu ledts XMC1200-t038 16 3 1 2 xmc1201-t038 16 - - 2 xmc1202-t028 14 3 1 - xmc1202-t016 11 2 1 - xmc1202-q024 13 3 1 - xmc1201-q040 16 - - 2 xmc1202-q040 16 3 1 - table 1 synopsis of XMC1200 device types (cont?d) derivative package flash kbytes sram kbytes subject to agreement on the use of product information XMC1200 xmc1000 family summary of features data sheet 12 v1.4, 2014-05 1.4 chip identification number the chip identification number allows software to identify the marking. it is a 8 words value with the most significant 7 words stor ed in flash configuration sector 0 (cs0) at address location : 1000 0f00 h (msb) - 1000 0f1b h (lsb). the least significant word and most significant word of the chip identi fication number are the value of registers dbgromid and idchip, respectively. table 3 adc channels 1) 1) some pins in a package may be connected to more than one channel. for the detailed mapping see the port i/o function table. package vadc0 g0 vadc0 g1 pg-tssop-16 ch0..ch5 ch0..ch4 pg-tssop-28 ch0..ch7 ch0 .. ch4, ch7 pg-tssop-38 ch0..ch7 ch0..ch7 pg-vqfn-24 ch0..ch7 ch0..ch4 pg-vqfn-40 ch0..ch7 ch1, ch5 .. ch7 table 4 XMC1200 chip identification number derivative value marking xmc1201-t038f0016 00012012 01cf00ff 00001ff7 00006000 00000b00 00001000 00005000 101ed083 h aa xmc1201-t038f0032 00012012 01cf00ff 00001ff7 00006000 00000b00 00001000 00009000 101ed083 h aa xmc1201-t038f0064 00012012 01cf00ff 00001ff7 00006000 00000b00 00001000 00011000 101ed083 h aa xmc1201-t038f0128 00012012 01cf00ff 00001ff7 00006000 00000b00 00001000 00021000 101ed083 h aa xmc1201-t038f0200 00012012 01cf00ff 00001ff7 00006000 00000b00 00001000 00033000 101ed083 h aa XMC1200-t038f0200 00012012 01cf00ff 00001ff7 0000e000 00000b00 00001000 00033000 101ed083 h aa xmc1202-t028x0016 00012023 01cf00ff 00001ff7 00008000 00000b00 00001000 00005000 101ed083 h aa xmc1202-t028x0032 00012023 01cf00ff 00001ff7 00008000 00000b00 00001000 00009000 101ed083 h aa subject to agreement on the use of product information XMC1200 xmc1000 family summary of features data sheet 13 v1.4, 2014-05 xmc1202-t016x0016 00012033 01cf00ff 00001ff7 00008000 00000b00 00001000 00005000 101ed083 h aa xmc1202-t016x0032 00012033 01cf00ff 00001ff7 00008000 00000b00 00001000 00009000 101ed083 h aa xmc1202-q024x0016 00012063 01cf00ff 00001ff7 00008000 00000b00 00001000 00005000 101ed083 h aa xmc1202-q024x0032 00012063 01cf00ff 00001ff7 00008000 00000b00 00001000 00009000 101ed083 h aa xmc1201-q040f0016 00012042 01cf00ff 00001ff7 00006000 00000b00 00001000 00005000 101ed083 h aa xmc1201-q040f0032 00012042 01cf00ff 00001ff7 00006000 00000b00 00001000 00009000 101ed083 h aa xmc1201-q040f0064 00012042 01cf00ff 00001ff7 00006000 00000b00 00001000 00011000 101ed083 h aa xmc1201-q040f0128 00012042 01cf00ff 00001ff7 00006000 00000b00 00001000 00021000 101ed083 h aa xmc1201-q040f0200 00012042 01cf00ff 00001ff7 00006000 00000b00 00001000 00033000 101ed083 h aa xmc1202-q040x0016 00012043 01cf00ff 00001ff7 00008000 00000b00 00001000 00005000 101ed083 h aa xmc1202-q040x0032 00012043 01cf00ff 00001ff7 00008000 00000b00 00001000 00009000 101ed083 h aa table 4 XMC1200 chip identification number (cont?d) derivative value marking subject to agreement on the use of product information XMC1200 xmc1000 family general device information data sheet 14 v1.4, 2014-05 2 general device information this section summarizes the logic symbols and package pin configurations with a detailed list of the functional i/o mapping. 2.1 logic symbols figure 2 XMC1200 logic symbol for tssop-38, tssop-28 and tssop-16 XMC1200 tssop-38 v ddp (2) v ssp (2) port 0 16 bit port 1 6bit port 2 4 bit XMC1200 tssop-28 v ddp (1) v ssp (1) XMC1200 tssop-16 v ddp (1) v ssp (1) port 2 8 bit port 0 12 bit port 1 4 bit port 2 4 bit port 2 6 bit port 0 8 bit port 2 3 bit port 2 3 bit subject to agreement on the use of product information XMC1200 xmc1000 family general device information data sheet 15 v1.4, 2014-05 figure 3 XMC1200 logic symbol for vqfn-24 and vqfn-40 XMC1200 vqfn-40 v dd (1) v ss (1) port 0 16 bit port 1 7 bit port 2 4 bit port 2 8 bit v ddp (2) v ssp (1) XMC1200 vqfn-24 v ddp (1) v ssp (1) port 0 10 bit port 1 4 bit port 2 4 bit port 2 4 bit subject to agreement on the use of product information XMC1200 xmc1000 family general device information data sheet 16 v1.4, 2014-05 2.2 pin configuration and definition the following figures summarize all pins, showing their locations on the different packages. figure 4 XMC1200 pg-tssop-38 pin configuration (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 37 36 35 34 33 32 31 30 29 38 p2.5 p2.6 p2.7 p0.10 v ssp /v ss v ddp /v dd p0.13 p0.14 p2.1 p2.0 p2.2 p0.11 p0.12 p1.4 p0.8 p0.9 p2.10 p2.9 p2.3 p2.4 p2.11 v ddp p1.3 p1.2 v ssp 15 16 17 18 19 24 23 22 21 20 p2.8 p1.5 p1.0 p0.0 p0.1 p1.1 p0.2 p0.6 p0.7 p0.4 p0.5 p0.3 p0.15 top view subject to agreement on the use of product information XMC1200 xmc1000 family general device information data sheet 17 v1.4, 2014-05 figure 5 XMC1200 pg-tssop-28 pin configuration (top view) figure 6 XMC1200 pg-tssop-16 pin configuration (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 18 17 16 15 27 26 25 24 23 22 21 20 19 28 p2.6 p2.7 v ssp /v ss v ddp /v dd p2.10 p2.9 p2.11 p1.3 p1.2 p2.8 p1.0 p0.0 p1.1 p0.4 top view p0.10 p0.13 p0.14 p2.1 p2.0 p2.2 p0.12 p0.8 p0.9 p2.5 p0.6 p0.7 p0.5 p0.15 1 2 3 4 5 6 7 8 15 14 13 12 11 10 9 16 p2.7/p2.8 v ssp /v ss v ddp /v dd p2.10 p2.9 p2.11 p0.5 p0.0 top view p0.14 p2.0 p0.8 p0.9 p2.6 p0.6 p0.7 p0.15 subject to agreement on the use of product information XMC1200 xmc1000 family general device information data sheet 18 v1.4, 2014-05 figure 7 XMC1200 pg-vqfn-24 pin configuration (top view) 123 456 7 9 10 11 16 15 14 13 12 24 23 22 21 20 19 18 17 p2 .0 v ddp p1.2 p0.5 p0.6 p0.0 p1.1 p1.0 p0 .13 8 p2 .1 p2.2 p2 .6 p2.7/p2.8 p2 .9 p2.10 p2.11 v ssp p0.7 p0.12 p0.9 p0.8 p1.3 p0 .15 p0.14 /v dd /v ss subject to agreement on the use of product information XMC1200 xmc1000 family general device information data sheet 19 v1.4, 2014-05 figure 8 XMC1200 pg-vqfn-40 pin configuration (top view) 12 3 45 678 910 11 13 14 15 24 23 22 21 20 19 18 17 16 36 35 34 33 32 31 30 29 28 27 26 25 37 38 39 40 p0.13 p0.12 p2.0 v ddp v ssp v ddp p1.6 p1.5 p1.4 p0.1 p0.2 p0.0 p1.1 p1.0 p0.11 12 p2.1 p2.2 p2.3 p2.4 p2.5 p2.6 p2.7 p2.8 p2.9 p2.10 p2.11 v ss v dd p1.3 p1.2 p0.6 p0.7 p0.5 p0.3 p0.4 p0 .10 p0 .9 p0 .8 p0.15 p0 .14 subject to agreement on the use of product information XMC1200 xmc1000 family general device information data sheet 20 v1.4, 2014-05 2.2.1 package pin summary the following general building block is used to describe each pin: the table is sorted by the ?function? column, starting with the regular port pins (px.y), followed by the supply pins. the following columns, titled with the supported package variants, lists the package pin number to which the respective function is mapped in that package. the ?pad type? indicates the employed pad type: ? std_inout (standard bi-directional pads) ? std_inout/an (standard bi-directional pads with analog input) ? high current (high current bi-directional pads) ? std_in/an (standard input pads with analog input) ? power (power supply) details about the pad properties are defined in the electrical parameters. table 5 package pin mapping description function package a package b ... pad type px.y n n pad class table 6 package pin mapping function vqfn 40 tssop 38 tssop 28 vqfn 24 tssop 16 pad type notes p0.0 23 17 13 15 7 std_inout p0.12418---std_inout p0.22519---std_inout p0.32620---std_inout p0.4 27 21 14 - - std_inout p0.5 28 22 15 16 8 std_inout p0.6 29 23 16 17 9 std_inout p0.7 30 24 17 18 10 std_inout p0.8 33 27 18 19 11 std_inout p0.9 34 28 19 20 12 std_inout p0.10 35 29 20 - - std_inout p0.11 36 30 - - - std_inout p0.12 37 31 21 21 - std_inout subject to agreement on the use of product information XMC1200 xmc1000 family general device information data sheet 21 v1.4, 2014-05 p0.13 38 32 22 22 - std_inout p0.143933232313std_inout p0.154034242414std_inout p1.0 22 16 12 14 - high current p1.1 21 15 11 13 - high current p1.2 20 14 10 12 - high current p1.3 19 13 9 11 - high current p1.4 18 12 - - - high current p1.5 17 11 - - - high current p1.6 16 - - - - std_inout p2.0 1 35 25 1 15 std_inout /an p2.1 2 36 26 2 - std_inout /an p2.2 3 37 27 3 - std_in/an p2.3 4 38 - - - std_in/an p2.451---std_in/an p2.5 6 2 28 - - std_in/an p2.6 7 3 1 4 16 std_in/an p2.784251std_in/an p2.895351std_in/an p2.9 10 6 4 6 2 std_in/an p2.10117573std_inout /an p2.11128684std_inout /an vss 13 9 7 9 5 power supply gnd, adc reference gnd table 6 package pin mapping function vqfn 40 tssop 38 tssop 28 vqfn 24 tssop 16 pad type notes subject to agreement on the use of product information XMC1200 xmc1000 family general device information data sheet 22 v1.4, 2014-05 vdd 14 10 8 10 6 power supply vdd, adc reference voltage/orc reference voltage. vdd has to be supplied with the same voltage as vddp vddp 15 10 8 10 6 power i/o port supply vssp 31 25 - - - power i/o port ground vddp 32 26 - - - power i/o port supply vssp exp. pad --exp. pad - power exposed die pad the exposed die pad is connected internally to vssp. for proper operation, it is mandatory to connect the exposed pad to the board ground. for thermal aspects, please refer to the package and reliability chapter. table 6 package pin mapping function vqfn 40 tssop 38 tssop 28 vqfn 24 tssop 16 pad type notes subject to agreement on the use of product information XMC1200 xmc1000 family general device information data sheet 23 v1.4, 2014-05 2.2.2 port i/o functions the following general building block is used to describe each port pin: pn.y is the port pin name, defining the cont rol and data bits/registers associated with it. as gpio, the port is under software control. its input value is read via pn_in.y, pn_out defines the output value. up to seven alternate output fu nctions (alt1/2/ 3/4/5/6/7) can be mapped to a single port pin, selected by pn_iocr.pc. the output va lue is directly driven by the respective module, with the pin characteristics controlled by the port registers (within the limits of the connected pad). the port pin input can be connected to mult iple peripherals. most peripherals have an input multiplexer to select between different possible input sources. the input path is also active while the pin is configured as output. th is allows to feedback an output to on-chip resources witho ut wasting an additional external pin. by pn_hwsel, it is possible to select between different hardware ?masters? (hwo0/hwi0, hwo1/hwi1). the selected peri pheral can take control of the pin(s). hardware control overrules settings in the respective port pin registers. table 7 port i/o function description function outputs inputs alt1 altn hwo0 hwi0 input input p0.0 moda.out modb.out modb.ina modc.ina pn.y moda.out moda.ina modc.inb subject to agreement on the use of product information XMC1200 xmc1000 family data sheet 24 v1.4, 2014-05 table 8 port i/o functions function outputs inputs alt1 alt2 alt3 alt4 alt5 alt6 alt7 hwo0 hwo1 hwi0 hwi1 input input input input input input input input p0.0 eru0. pdout0 ledts0. line7 eru0. gout0 ccu40. out0 usic0_ch0. selo0 usic0_ch1. selo0 ledts0. extended7 ledts0. tsin7 ledts0. tsin7 bccu0. trapinb ccu40.in0c usic0_ch0. dx2a usic0_ch1. dx2a p0.1 eru0. pdout1 ledts0. line6 eru0. gout1 ccu40. out1 bccu0. out8 scu. vdrop ledts0. extended6 ledts0. tsin6 ledts0. tsin6 ccu40.in1c p0.2 eru0. pdout2 ledts0. line5 eru0. gout2 ccu40. out2 vadc0. emux02 ledts0. extended5 ledts0. tsin5 ledts0. tsin5 ccu40.in2c p0.3 eru0. pdout3 ledts0. line4 eru0. gout3 ccu40. out3 vadc0. emux01 ledts0. extended4 ledts0. tsin4 ledts0. tsin4 ccu40.in3c p0.4 bccu0. out0 ledts0. line3 ledts0. col3 ccu40. out1 vadc0. emux00 wwdt. service_o ut ledts0. extended3 ledts0. tsin3 ledts0. tsin3 p0.5 bccu0. out1 ledts0. line2 ledts0. col2 ccu40. out 0 a cmp2. out ledts0. extended2 ledts0. tsin2 ledts0. tsin2 p0.6 bccu0. out2 ledts0. line1 ledts0. col1 ccu40. out0 usic0_ch1. mclkout usic0_ch1. dout0 ledts0. extended1 ledts0. tsin1 ledts0. tsin1 ccu40.in0b usic0_ch1. dx0c p0.7 bccu0. out3 ledts0. line0 ledts0. col0 ccu40. out1 usic0_ch0. sclkout usic0_ch1. dout0 ledts0. extended0 ledts0. tsin0 ledts0. tsin0 ccu40.in1b usic0_ch0. dx1c usic0_ch1. dx0d usic0_ch1. dx1c p0.8 bccu0. out4 ledts1. line0 ledts0. cola ccu40. out2 usic0_ch0. sclkout usic0_ch1. sclkout ledts1. extended0 ledts1. tsin0 ledts1. tsin0 ccu40.in2b usic0_ch0. dx1b usic0_ch1. dx1b p0.9 bccu0. out5 ledts1. line1 ledts0. col6 ccu40. out3 usic0_ch0. selo0 usic0_ch1. selo0 ledts1. extended1 ledts1. tsin1 ledts1. tsin1 ccu40.in3b usic0_ch0. dx2b usic0_ch1. dx2b p0.10 bccu0. out6 ledts1. line2 ledts0. col5 acmp0. out usic0_ch0. sel o 1 usic0_ch1. selo1 ledts1. extended2 ledts1. tsin2 ledts1. tsin2 usic0_ch0. dx2c usic0_ch1. dx2c p0.11 bccu0. out7 ledts1. line3 ledts0. col4 usic0_ch0. mclkout usic0_ch0. selo2 usic0_ch1. selo2 ledts1. extended3 ledts1. tsin3 ledts1. tsin3 usic0_ch0. dx2d usic0_ch1. dx2d p0.12 bccu0. out6 ledts1. line4 ledts0. col3 ledts1. col3 usic0_ch0. selo3 ledts1. extended4 ledts1. tsin4 ledts1. tsin4 bccu0. trapina ccu40.in0a ccu40.in1a ccu40.in2a ccu40.in3a usic0_ch0. dx2e p0.13 wwdt. service_o ut ledts1. line5 ledts0. col2 ledts1. col2 usic0_ch0. selo4 ledts1. extended5 ledts1. tsin5 ledts1. tsin5 usic0_ch0. dx2f p0.14 bccu0. out7 ledts1. line6 ledts0. col1 ledts1. col1 usic0_ch0. dout0 usic0_ch0. sclkout ledts1. extended6 ledts1. tsin6 ledts1. tsin6 usic0_ch0. dx0a usic0_ch0. dx1a p0.15 bccu0. out8 ledts1. line7 ledts0. col0 le d ts1. col0 usic0_ch0. dout0 usic0_ch1. mclkout ledts1. extended7 ledts1. tsin7 ledts1. tsin7 usic0_ch0. dx0b p1.0 bccu0. out0 ccu40. out0 ledts0. col0 ledts1. cola acmp1. out usic0_ch0. dout0 usic0_ch0. dout0 usic0_ch0. hwin0 usic0_ch0. dx0c p1.1 vadc0. emux00 ccu40. out1 ledts0. col1 ledts1. col0 usic0_ch0. dout0 usic0_ch1. selo0 usic0_ch0. dout1 usic0_ch0. hwin1 usic0_ch0. dx0d usic0_ch0. dx1d usic0_ch1. dx2e p1.2 vadc0. emux01 ccu40. out2 ledts0. col2 ledts1. col1 acmp2. out usic0_ch1. dout0 usic0_ch0. dout2 usic0_ch0. hwin2 usic0_ch1. dx0b p1.3 vadc0. emux02 ccu40. out3 ledts0. col3 ledts1. col2 usic0_ch1. sclkout usic0_ch1. dout0 usic0_ch0. dout3 usic0_ch0. hwin3 usic0_ch1. dx0a usic0_ch1. dx1a p1.4 vadc0. emux10 usic0_ch1. sclkout ledts0. col4 ledts1. col3 usic0_ch0. selo0 usic0_ch1. selo1 usic0_ch0. dx5 e usic0 _ch1. dx5e p1.5 vadc0. emux11 usic0_ch0. dout0 ledts0. cola bccu0. out1 usic0_ch0. selo1 usic0_ch1. selo2 usic0_ch1. dx5f subject to agreement on the use of product information XMC1200 xmc1000 family data sheet 25 v1.4, 2014-05 p1.6 vadc0. emux12 usic0_ch1. dout0 ledts0. col5 usic0_ch0. sclkout usic0_ch0. selo2 usic0_ch1. selo3 usic0_ch0. dx5f p2.0 eru0. pdout3 ccu40. out0 eru0. gout3 ledts1. col5 usic0_ch0. dout0 usic0_ch0. sclkout vadc0. g0ch5 eru0.0b0 usic0_ch0. dx0e usic0_ch0. dx1e usic0_ch1. dx2f p2.1 eru0. pdout2 ccu40. out1 eru0. gout2 ledts1. col6 usic0_ch0. dout0 usic0_ch1. sclkout acmp2.inp vadc0. g0ch6 eru0.1b0 usic0_ch0. dx0f usic0_ch1. dx3a usic0_ch1. dx4a p2.2 acmp2.inn vadc0. g0ch7 eru0.0b1 usic0_ch0. dx3a usic0_ch0. dx4a usic0_ch1. dx5a orc0.ain p2.3 vadc0. g1ch5 eru0.1b1 usic0_ch0. dx5b usic0_ch1. dx3c usic0_ch1. dx4c orc1.ain p2.4 vadc0. g1ch6 eru0.0a1 usic0_ch0. dx3b usic0_ch0. dx4b usic0_ch1. dx5b orc2.ain p2.5 vadc0. g1ch7 eru0.1a1 usic0_ch0. dx5d usic0_ch1. dx3e usic0_ch1. dx4e orc3.ain p2.6 acmp1.inn vadc0. g0ch0 eru0.2a1 usic0_ch0. dx3e usic0_ch0. dx4e usic0_ch1. dx5 d orc4 .ain p2.7 acmp1.inp vadc0. g1ch1 eru0.3a1 usic0_ch0. dx5c usic0_ch1. dx3d usic0_ch1. dx4d orc5.ain p2.8 acmp0.inn vadc0. g0ch1 vadc0. g1ch0 eru0.3b1 usic0_ch0. dx3d usic0_ch0. dx4d usic0_ch1. dx5c orc6.ain p2.9 acmp0.inp vadc0. g0ch2 vadc0. g1ch4 eru0.3b0 usic0_ch0. dx5a usic0_ch1. dx3b usic0_ch1. dx4b orc7.ain p2.10 eru0. pdout1 ccu40. out2 eru0. gout1 ledts1. col4 acmp0. out usic0_ch1. dout0 vadc0. g0ch3 vadc0. g1ch2 eru0.2b0 usic0_ch0. dx3c usic0_ch0. dx4c usic0_ch1. dx0f p2.11 eru0. pdout0 ccu40. out3 eru0. gout0 ledts1. col3 usic0_ch1. sclkout usic0_ch1. dout0 acmp.ref vadc0. g0ch4 vadc0. g1ch3 eru0.2b1 usic0_ch1. dx0e usic0_ch1. dx1e table 8 port i/o functions (cont?d) function outputs inputs alt1 alt2 alt3 alt4 alt5 alt6 alt7 hwo0 hwo1 hwi0 hwi1 input input input input input input input input subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 26 v1.4, 2014-05 3 electrical parameter this section provides the electrical parame ter which are implementation-specific for the XMC1200. 3.1 general parameters 3.1.1 parameter interpretation the parameters listed in this section repres ent partly the characteristics of the XMC1200 and partly its requirements on the system. to aid interpreting the parameters easily when evaluating them for a design, they are indicated by the abbreviations in the ?symbol? column: ? cc such parameters indicate c ontroller c haracteristics, which ar e distinctive feature of the XMC1200 and must be regarded for a system design. ? sr such parameters indicate s ystem r equirements, which must be provided by the application system in which t he XMC1200 is designed in. subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 27 v1.4, 2014-05 3.1.2 absolute maximum ratings stresses above the values listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a st ress rating only and functional operation of the device at these or any ot her conditions above those indicated in the operational sections of this specificat ion is not implied. exposure to absolute maximum rating conditions may affect device reliability. table 9 absolute maximu m rating parameters parameter symbol values unit note / test cond ition min. typ. max. junction temperature t j sr -40 ? 115 t s sr -40 ? 125 v ssp v ddp sr -0.3 ? 6 v ? voltage on any pin with respect to v ssp v in sr -0.5 ? v ddp + 0.5 or max. 6 v whichever is lower voltage on any analog input pin with respect to v ssp v ain v aref sr -0.5 ? v ddp + 0.5 or max. 6 v? input current on any pin during overload condition i in sr -10 ? 10 ma ? absolute sum of all input currents during overload condition | i in | sr ? v cm sr -0.3 ? v ddp + 0.3 v subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 28 v1.4, 2014-05 3.1.3 operating conditions the following operating conditions must not be exceeded in order to ensure correct operation and reliability of the XMC1200. all parameters specified in the following tables refer to these operating condi tions, unless noted otherwise. table 10 operating conditions parameters parameter symbol values unit note / test condition min. typ. max. ambient temperature t a sr -40 ? ? chapter 3.3.3 . v ddp sr 1.8 ? f mclk cc ?? f pclk cc ?? subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 29 v1.4, 2014-05 3.2 dc parameters 3.2.1 input/output characteristics table 11 provides the characteristics of t he input/output pins of the XMC1200. table 11 input/output characteristics (operating conditions apply) parameter symbol limit values unit test conditions min. max. output low voltage on port pins (with standard pads) v olp cc ? 1.0 v i ol = 11 ma (5 v) i ol = 7 ma (3.3 v) ?0.4v i ol = 5 ma (5 v) i ol = 3.5 ma (3.3 v) output low voltage on high current pads v olp1 cc ? 1.0 v i ol = 50 ma (5 v) i ol = 25 ma (3.3 v) ?0.32v i ol = 10 ma (5 v) ?0.4v i ol = 5 ma (3.3 v) output high voltage on port pins (with standard pads) v ohp cc v ddp - 1.0 ?v i oh = -10 ma (5 v) i oh = -7 ma (3.3 v) v ddp - 0.4 ?v i oh =-4.5ma (5v) i oh =-2.5ma (3.3v) output high voltage on high current pads v ohp1 cc v ddp - 0.32 ?v i oh = -6 ma (5 v) v ddp - 1.0 ?v i oh = -8 ma (3.3 v) v ddp - 0.4 ?v i oh = -4 ma (3.3 v) input low voltage on port pins (standard hysteresis) v ilps sr ? 0.19 v ddp v cmos mode (5 v, 3.3 v & 2.2 v) input high voltage on port pins (standard hysteresis) v ihps sr 0.7 v ddp ?vcmos mode (5 v, 3.3 v & 2.2 v) input low voltage on port pins (large hysteresis) v ilpl sr ? 0.08 v ddp v cmos mode (5 v, 3.3 v & 2.2 v) 3) subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 30 v1.4, 2014-05 input high voltage on port pins (large hysteresis) v ihpl sr 0.85 v ddp ?vcmos mode (5 v, 3.3 v & 2.2 v) 3) input hysteresis 1) hys cc 0.08 v ddp ? v cmos mode (5 v), standard hysteresis 0.03 v ddp ? v cmos mode (3.3 v), standard hysteresis 0.02 v ddp ? v cmos mode (2.2 v), standard hysteresis 0.5 v ddp 0.75 v ddp v cmos mode(5 v), large hysteresis 0.4 v ddp 0.75 v ddp v cmos mode(3.3 v), large hysteresis 0.2 v ddp 0.65 v ddp v cmos mode(2.2 v), large hysteresis pull-up resistor on port pins r pup cc 20 50 kohm v in = v ssp pull-down resistor on port pins r pdp cc 20 50 kohm v in = v ddp input leakage current 2) i ozp cc -1 1 v in < v ddp , t a i ovp sr -5 5 ma absolute sum of overload currents | i ov |sr? 25 ma 3) voltage on any pin during v ddp power off v po sr ? 0.3 v 4) maximum current per pin (excluding p1, v ddp and v ss ) i mp sr -10 11 ma ? maximum current per high currrent pins i mp1a sr -10 50 ma ? table 11 input/output characteristics (operating conditions apply) (cont?d) parameter symbol limit values unit test conditions min. max. subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 31 v1.4, 2014-05 maximum current into v ddp (tssop28/16, vqfn24) i mvdd1 sr ? 130 ma 3) maximum current into v ddp (tssop38, vqfn40) i mvdd2 sr ? 260 ma 3) maximum current out of v ss (tssop28/16, vqfn24) i mvss1 sr ? 130 ma 3) maximum current out of v ss (tssop38, vqfn40) i mvss2 sr ? 260 ma 3) 1) not subject to production test, verified by design/c haracterization. hysteresis is implemented to avoid meta stable states and switching due to internal ground bounce. it cannot be guaranteed that it suppresses switching due to external system noise. 2) an additional error current ( i inj ) will flow if an overload current flows through an adjacent pin. 3) not subject to production test, ve rified by design/characterization. 4) not subject to production test, verified by design/char acterization. however, for applications with strict low power-down current requirements, it is mandatory that no active voltage source is supplied at any gpio pin when v ddp is powered off. table 11 input/output characteristics (operating conditions apply) (cont?d) parameter symbol limit values unit test conditions min. max. subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 32 v1.4, 2014-05 3.2.2 analog to digital converters (adc) table 12 shows the analog to digital converter (adc) characteristics. table 12 adc characteristics (o perating conditions apply) parameter symbol values unit note / test condition min. typ. max. supply voltage range (internal reference) v dd_int sr 1.8 ? 3.0 v shscfg.aref = 11 b 3.0 ? 5.5 v shscfg.aref = 10 b supply voltage range (external reference) v dd_ext sr 3.0 ? 5.5 v shscfg.aref = 00 b analog input voltage range v ain sr v ssp - 0.05 ? v ddp + 0.05 v auxiliary analog reference ground (sh0-ch0, sh1-ch0) v refgnd sr v ssp - 0.05 ? v ddp + 0.05 v internal reference voltage (full scale value) v refint cc 4.82 5 5.18 v -40 c ains cc ? 1.2 2 pf gnctrxz.gainy = 00 b (unity gain) ? 1.2 2 pf gnctrxz.gainy = 01 b (gain g1) ? 4.5 6 pf gnctrxz.gainy = 10 b (gain g2) ? 4.5 6 pf gnctrxz.gainy = 11 b (gain g3) total capacitance of an analog input c aint cc ? ? 10 pf 1) total capacitance of the reference input c areft cc ? ? 10 pf 1) subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 33 v1.4, 2014-05 gain settings g in cc 1 ? gnctrxz.gainy = 00 b (unity gain) 3 ? gnctrxz.gainy = 01 b (gain g1) 6 ? gnctrxz.gainy = 10 b (gain g2) 12 ? gnctrxz.gainy = 11 b (gain g3) sample time t sample cc 3 ? ? 1 / f adc v ddp = 5.0 v 3 ? ? 1 / f adc v ddp = 3.3 v 30 ? ? 1 / f adc v ddp = 1.8 v sigma delta loop hold time t sd_hold cc 20 ? ? t cf cc 9 1 / f adc 2) conversion time in 12-bit mode t c12 cc 20 1 / f adc 2) maximum sample rate in 12-bit mode 3) f c12 cc ? ? f adc / 42.5 ?1 sample pending ?? f adc / 62.5 ? 2 samples pending conversion time in 10-bit mode t c10 cc 18 1 / f adc 2) maximum sample rate in 10-bit mode 3) f c10 cc ? ? f adc / 40.5 ?1 sample pending ?? f adc / 58.5 ? 2 samples pending conversion time in 8-bit mode t c8 cc 16 1 / f adc 2) table 12 adc characteristics (o perating conditions apply) (cont?d) parameter symbol values unit note / test condition min. typ. max. subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 34 v1.4, 2014-05 maximum sample rate in 8-bit mode 3) f c8 cc ? ? f adc / 38.5 ?1 sample pending ?? f adc / 54.5 ? 2 samples pending dnl error ea dnl cc ? 2.0 ? lsb 12 inl error ea inl cc ? 4.0 ? lsb 12 gain error with external reference ea gain cc ? 0.5 ? % shscfg.aref = 00 b (calibrated) gain error with internal reference ea gain cc ? 3.6 ? % shscfg.aref = 1x b (calibrated), -40 ea off cc ? 6.0 ? lsb 12 calibrated 1) not subject to production test, ve rified by design/characterization. 2) no pending samples assumed, excluding sampling time and calibration. 3) includes synchronization and calibration (average of gain and offset calibration). table 12 adc characteristics (o perating conditions apply) (cont?d) parameter symbol values unit note / test condition min. typ. max. subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 35 v1.4, 2014-05 figure 9 adc voltage supply mc_vadc_arefpaths aref : v agnd sar converter v aref vss vdd internal reference refsel 0 1 00 1x v dd ch7 . . ch0 v ddint / v ddext v ain v refgnd v refint chnr subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 36 v1.4, 2014-05 3.2.3 out of range comparator (orc) characteristics the out-of-range comparator (orc) triggers on analog input voltages ( v ain ) above the v ddp on selected input pins (orcx.ain) and generates a service request trigger (orcx.out). note: these parameters are not subject to production test, but verified by design and/or characterization. figure 10 orcx.out trigger generation table 13 out of range comparator (orc) characteristics (operating conditions apply; v ddp = 3.0 v - 5.5 v) parameter symbol values unit note / test condition min. typ. max. dc switching level v odc cc 60 ? v ain v ddp + v odc hysteresis v ohys cc 25 ? v odc mv always detected overvoltage pulse t opdd cc 103 ?? v ain v ddp + 150 mv 88 ?? v ain v ddp + 350 mv never detected overvoltage pulse t opdn cc ?? v ain v ddp + 150 mv ?? v ain v ddp + 350 mv detection delay t odd cc 39 ? v ain v ddp + 150 mv 31 ? v ain v ddp + 350 mv release delay t ord cc 44 ? v ain v ddp ; v ddp = 5 v 57 ? v ain v ddp ; v ddp = 3.3 v enable delay t oed cc ?? v ss v ddp t ord v odc v ohys t odd orcx . out orcx . ain subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 37 v1.4, 2014-05 3.2.4 analog comparator characteristics table 14 below shows the analog comparator characteristics. table 14 analog comparator characteristics (operating conditions apply) parameter symbol limit values unit notes/ test conditions min. typ. max. input voltage v cmp sr -0.05 ? v ddp + 0.05 v input offset v cmpoff cc ? +/-3 ? mv high power mode v cmp < 200 mv ? +/-20 ? mv low power mode 2) v cmp < 200 mv propagation delay 1)2) 1) total analog comparator delay is the sum of propagation delay and filter delay. t pdelay cc ? 25 ? ns high power mode, v cmp = 100 mv ? 80 ? ns high power mode, v cmp = 25 mv ? 250 ? ns low power mode, v cmp = 100 mv ? 700 ? ns low power mode, v cmp = 25 mv current consumption 2) i acmp cc ? 100 ? v cmp > 30 mv ?66? v cmp > 30 mv ?10? v hys cc ? 15 ? mv filter delay 1)2) t fdelay cc ? 5 ? ns subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 38 v1.4, 2014-05 3.2.5 temperature sensor characteristics table 15 temperature sensor characteristics 1) 1) not subject to production test, ve rified by design/characterization. parameter symbol values unit note / test condition min. typ. max. measurement time t m cc ?? t sr sr -40 ? t tsal cc ? ? t j =-40c ? ? t j =-25c -5 ? t j =0c -2 ? t j =25c -4 ? t j =70c -2 ? t j =115c subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 39 v1.4, 2014-05 3.2.6 power supply current the total power supply current defined belo w consists of a leakage and a switching component. application relevant values are typically lowe r than those given in the following tables, and depend on the customer's system operat ing conditions (e.g. thermal connection or used application configurations). table 16 power supply parameters 1) 1) not all parameters are 100% tested, but are verified by design/characterisation and test correlation. parameter symbol values unit note / test condition min. typ. 2) 2) the typical values are measured at t a =+25 v ddp =5v. max. active mode current 3) 3) cpu and all peripherals clock en abled, flash is in active mode. i ddpa cc ? f mclk = f pclk = ? ? f mclk = f pclk = i ddpse cc ? ? f mclk = f pclk = i ddpsd cc ? ? f mclk = f pclk = i ddpds cc ? ? t ssa cc ? ? t dsa cc ? ? subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 40 v1.4, 2014-05 table 17 provides the active current consumpt ion of some modules operating at 5 v power supply at 25 table 17 typical active current consumption 1) 1) not subject to production test, ve rified by design/characterisation. active current consumption symbol limit values unit test condition typ. baseload current i cpuddc 5.04 ma modules including core, scu, port, memories, anatop 2) 2) baseload current is measured with device running in user mode, mclk=pclk=32 mhz, with an endless loop in the flash memory. the clock to the modules stated in cgatstat0 are gated. vadc and shs i adcddc 3.4 ma set cgatclr0.vadc to 1 3) 3) active current is measured with: module enabled, mclk=32 mhz, running in auto-scan conversion mode usic0 i usic0ddc 0.87 ma set cgatclr0.usic0 to 1 4) 4) active current is measured with: module enabled, alte rnating messages sent to pc at 57.6kbaud every 200ms ccu40 i ccu40ddc 0.94 ma set cgatclr0.ccu40 to 1 5) 5) active current is measured with: module enabled, mclk=pclk=32 mhz, 1 ccu4 slice for pwm switching from 1500hz and 1000hz at regular intervals, 1 ccu4 slice in capture mode for reading period and duty cycle ledtsx i ltsxddc 0.76 ma set cgatclr0.ledtsx to 1 6) 6) active current is measured with: module enabled, mclk=32 mhz, 1 led column, 6 led/ts lines, pad scheme a with large pad hysteresis c onfig, time slice duration = 1.048 ms bccu0 i bccu0ddc 0.24 ma set cgatclr0.bccu0 to 1 7) 7) active current is measured with: module enabled, mclk=32 mhz, pclk=64mhz, fclk=0.8mhz, normal mode (bccu clk = fclk/4), 3 bccu channels and 1 dimming engine, change color or dim every 1s wdt i wdtddc 0.03 ma set cgatclr0.wdt to 1 8) 8) active current is measured with: module enabled, mclk=32 mhz, time-out mode; wlb = 0, wub = 0x00008000; wdt serviced every 1s rtc i rtcddc 0.01 ma set cgatclr0.rtc to 1 9) 9) active current is measured with: module enabled, mclk=32 mhz, periodic interrupt enabled subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 41 v1.4, 2014-05 3.2.7 flash memory parameters note: these parameters are not subject to production test, but verified by design and/or characterization. table 18 flash memory parameters parameter symbol values unit note / test condition min. typ. max. erase time per page t erase cc 6.8 7.1 7.6 ms program time per block t pser cc 102 152 204 t wu cc ? ? t a cc ? ? t ret cc 10 ?? n wsflash cc 0 0.5 ? f mclk = ? f mclk = ? f mclk = n ecyc cc ?? n tecyc cc ?? subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 42 v1.4, 2014-05 3.3 ac parameters 3.3.1 testing waveforms figure 11 rise/fall time parameters figure 12 testing waveform, output delay figure 13 testing waveform, output high impedance 10 % 90% v ss v ddp t r t f 10% 90% v ddp / 2 v ddp / 2 v ddp v ss test points v load + 0.1v timing reference points v load -0.1v v oh -0.1v v ol + 0.1v subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 43 v1.4, 2014-05 3.3.2 output rise/fall times table 19 provides the characteristics of the output rise/fall times in the XMC1200. figure 11 describes the rise time and fall time parameters. table 19 output rise/fall times parameters (operating conditions apply) parameter symbol limit va lues unit test conditions min. max. rise/fall times on high current pad 1)2) 1) rise/fall time parameters are taken with 10% - 90% of supply. 2) not all parameters are 100% tested, but are verified by design/characterisation and test correlation. t hcpr , t hcpf ? 9 ns 50 pf @ 5 v 3) 3) additional rise/fall time valid for c l =50pf-c l = 100 pf @ 0.150 ns/pf at 5 v supply voltage. ? 12 ns 50 pf @ 3.3 v 4) 4) additional rise/fall time valid for c l =50pf-c l = 100 pf @ 0.205 ns/pf at 3.3 v supply voltage. ? 25 ns 50 pf @ 1.8 v 5) 5) additional rise/fall time valid for c l =50pf-c l = 100 pf @ 0.445 ns/pf at 1.8 v supply voltage. rise/fall times on standard pad 1)2) t r , t f ? 12 ns 50 pf @ 5 v 6) 6) additional rise/fall time valid for c l =50pf-c l = 100 pf @ 0.225 ns/pf at 5 v supply voltage. ? 15 ns 50 pf @ 3.3 v 7) . 7) additional rise/fall time valid for c l =50pf-c l = 100 pf @ 0.288 ns/pf at 3.3 v supply voltage. ? 31 ns 50 pf @ 1.8 v 8) . 8) additional rise/fall time valid for c l =50pf-c l = 100 pf @ 0.588 ns/pf at 1.8 v supply voltage. subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 44 v1.4, 2014-05 3.3.3 power-up and supply th reshold charcteristics table 20 provides the characteristics of the supply threshold in XMC1200. table 20 power-up and supply threshold parameters (operating conditions apply) 1) 1) not all parameters are 100% tested, but are verified by design/characterisation. parameter symbol values unit note / test condition min. typ. max. v ddp ramp-up time t rampup sr v ddp / s vddprise ? v ddp slew rate s vddpop sr 0 ? s vddp10 sr 0 ? v ddp s vddprise sr 0 ? s vddpfall 2) sr 2) a capacitor of at least 100 nf has to be added between v ddp and v ssp to fulfill the requirement as stated for this parameter. 0 ? v ddp prewarning voltage v ddppw cc 2.1 2.25 2.4 v anavdel.vdel_ select = 00 b 2.85 3 3.15 v anavdel.vdel_ select = 01 b 4.2 4.4 4.6 v anavdel.vdel_ select = 10 b v ddp brownout reset voltage v ddpbo cc 1.55 1.62 1.75 v calibrated, before user code starts running start-up time from power-on reset t ssw sr ? subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 45 v1.4, 2014-05 figure 14 supply threshold parameters 3) valid for a 100 nf buffer capacitor connected to suppl y pin where current from capacitor is forwarded only to the chip. a larger capacitor value has to be chosen if the power source sink a current. 4) this values does not include the ramp-up time. during startup firmware execution, mclk is running at 32 mhz and the clocks to peripheral as specif ied in register cgatstat0 are gated. vddp } 5.0v v ddppw v ddpbo subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 46 v1.4, 2014-05 3.3.4 on-chip oscillator characteristics table 21 provides the characteristics of t he 64 mhz clock output from the digital controlled oscillator, dco1 in XMC1200. table 21 64 mhz dco1 characteristics (operating conditions apply) parameter symbol limit values unit test conditions min. typ. max. nominal frequency f nom cc 63.5 64 64.5 mhz under nominal conditions 1) after trimming 1) the deviation is relative to the factory trimmed frequency at nominal v ddc and t a =+25 f lt cc -1.7 ? 3.4 % with respect to f nom (typ), over temperature (0 f nom (typ), over temperature (-40 f ltt cc -1.3 ? 1.25 % with respect to f nom (typ), over temperature ( t a = 0 f nom (typ), over temperature ( t a = -40 subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 47 v1.4, 2014-05 figure 15 shows the typical curves for the accuracy of dco1, with and without calibration based on temperature sensor, respectively. figure 15 typical dco1 accuracy over temperature table 22 provides the characteristics of the 32 khz clock output from digital controlled oscillators, dco2 in XMC1200. table 22 32 khz dco2 characteristi cs (operating conditions apply) parameter symbol limit values unit test conditions min. typ. max. nominal frequency f nom cc 32.5 32.75 33 khz under nominal conditions 1) after trimming 1) the deviation is relative to the factory trimmed frequency at nominal v ddc and t a =+25 f lt cc -1.7 ? 3.4 % with respect to f nom (typ), over temperature (0 f nom (typ), over temperature (-40 accuracy [%] temperature [ c] without calibration based on temperature sensor with calibration based on temperature sensor subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 48 v1.4, 2014-05 3.3.5 serial wire debug port (sw-dp) timing the following parameters are applicable for communication through the sw-dp interface. note: these parameters are not subject to production test, but verified by design and/or characterization. figure 16 swd timing table 23 swd interface timing parameters (operating conditions apply) parameter symbol values unit note / test condition min. typ. max. swdclk high time t 1 sr 50 ? 500000 ns ? swdclk low time t 2 sr 50 ? 500000 ns ? swdio input setup to swdclk rising edge t 3 sr 10 ? ? ns ? swdio input hold after swdclk rising edge t 4 sr 10 ? ? ns ? swdio output valid time after swdclk rising edge t 5 cc ? ? 68 ns c l =50pf ? ? 62 ns c l =30pf swdio output hold time from swdclk rising edge t 6 cc 4 ? ? ns swdclk swdio (output ) t 1 t 2 t 6 t 5 swdio (input ) t 3 t 4 subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 49 v1.4, 2014-05 3.3.6 spd timing requirements the optimum spd decision time between 0 b and 1 b is 0.75 s. with this value the system has maximum robustness against frequency deviations of the sampling clock on tool and on device side. however it is not always possible to exactly match this value with the given constraints for the sample clock. for instance for a oversampling rate of 4, the sample clock will be 8 mhz and in this case the closest possible effective decision time is 5.5 clock cycles (0.69 s). for a balanced distribution of the timing ro bustness of spd between tool and device, the timing requirements for the tool are: ? frequency deviation of the sample clock is +/- 5% ? effective decision time is between 0. 69 s and 0.75 s (calculated with nominal sample frequency) table 24 optimum number of sample clocks for spd sample freq. sampling factor sample clocks 0 b sample clocks 1 b effective decision time 1) 1) nominal sample frequency period multiplied with 0.5 + (max. number of 0 b sample clocks) remark 8 mhz 4 1 to 5 6 to 12 0.69 s the other closest option (0.81 s) for the effective decision time is less robust. subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 50 v1.4, 2014-05 3.3.7 peripheral timings note: these parameters are not subject to production test, but verified by design and/or characterization. 3.3.7.1 synchronous serial in terface (usic ssc) timing the following parameters are applicable for a usic channel operated in ssc mode. note: operating conditions apply. table 25 usic ssc master mode timing parameter symbol values unit note / test condition min. typ. max. slave select output selo active to first sclkout transmit edge t 1 cc 80 ?? t 2 cc 0 ?? t 3 cc -10 ? t 4 sr 80 ?? t 5 sr 0 ?? table 26 usic ssc slave mode timing parameter symbol values unit note / test condition min. typ. max. select input dx2 setup to first clock input dx1 transmit edge 1) t 10 sr 10 ?? t 11 sr 10 ?? subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 51 v1.4, 2014-05 receive data input dx0/dx[5:3] setup time to shift clock receive edge 1) t 12 sr 10 ?? t 13 sr 10 ?? t 14 cc - ? table 26 usic ssc slave mode timing (cont?d) parameter symbol values unit note / test condition min. typ. max. subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 52 v1.4, 2014-05 figure 17 usic - ssc master/slave mode timing note: this timing diagram shows a standard configuration, for which the slave select signal is low-active, and the serial clock signal is not shifted and not inverted. t 2 t 1 usic_ssc_tmgx.vsd clock output sclkout data output dout[3:0] t 3 t 3 t 5 data valid t 4 fi rs t trans mi t edge data input dx0/dx[5:3] select output selox active master mode timing slave mode timing t 11 t 10 clock input dx1 data output dout[3:0] t 14 t 14 data valid data input dx0/dx[5:3] select input dx2 active t 13 t 12 transmit edge: with this clock edge , transmit data is shifted to transmit data output . receive edge: with this clock edge , receive data at receive data input is latched . receive edge last receive edge inactive inactive transmit edge inactive inactive first transmit edge receive edge transmit edge last receive edge t 5 data valid t 4 data valid t 12 t 13 drawn for brgh .sclkcfg = 00 b . also valid for for sclkcfg = 01 b with inverted sclkout signal. subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 53 v1.4, 2014-05 3.3.7.2 inter-ic (iic) interface timing the following parameters are applicable fo r a usic channel operated in iic mode. note: operating conditions apply. table 27 usic iic standard mode timing 1) 1) due to the wired-and configuration of an iic bus system, the port drivers of the scl and sda signal lines need to operate in open-drain mode. the high level on these lines must be held by an external pull-up device, approximalely 10 kohm for operation at 100 kbit/s, approximately 2 kohm for operation at 400 kbit/s. parameter symbol values unit note / test condition min. typ. max. fall time of both sda and scl t 1 cc/sr --300ns rise time of both sda and scl t 2 cc/sr - - 1000 ns data hold time t 3 cc/sr 0- - s data set-up time t 4 cc/sr 250 - - ns low period of scl clock t 5 cc/sr 4.7 - - s high period of scl clock t 6 cc/sr 4.0 - - s hold time for (repeated) start condition t 7 cc/sr 4.0 - - s set-up time for repeated start condition t 8 cc/sr 4.7 - - s set-up time for stop condition t 9 cc/sr 4.0 - - s bus free time between a stop and start condition t 10 cc/sr 4.7 - - s capacitive load for each bus line c b sr - - 400 pf subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 54 v1.4, 2014-05 table 28 usic iic fast mode timing 1) 1) due to the wired-and configuration of an iic bus system, the port drivers of the scl and sda signal lines need to operate in open-drain mode. the high level on these lines must be held by an external pull-up device, approximalely 10 kohm for operation at 100 kbit/s, approximately 2 kohm for operation at 400 kbit/s. parameter symbol values unit note / test condition min. typ. max. fall time of both sda and scl t 1 cc/sr 20 + 0.1*c b 2) 2) c b refers to the total capacitance of one bus line in pf. - 300 ns rise time of both sda and scl t 2 cc/sr 20 + 0.1*c b - 300 ns data hold time t 3 cc/sr 0- - s data set-up time t 4 cc/sr 100 - - ns low period of scl clock t 5 cc/sr 1.3 - - s high period of scl clock t 6 cc/sr 0.6 - - s hold time for (repeated) start condition t 7 cc/sr 0.6 - - s set-up time for repeated start condition t 8 cc/sr 0.6 - - s set-up time for stop condition t 9 cc/sr 0.6 - - s bus free time between a stop and start condition t 10 cc/sr 1.3 - - s capacitive load for each bus line c b sr - - 400 pf subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 55 v1.4, 2014-05 figure 18 usic iic stand and fast mode timing 3.3.7.3 inter-ic sound (iis) interface timing the following parameters are applicable for a usic channel operated in iis mode. note: operating conditions apply. table 29 usic iis master transmitter timing parameter symbol values unit note / test condition min. typ. max. clock period t 1 cc 2/ f mclk --ns v ddp f mclk --ns v ddp < t 2 cc 0.35 x t 1min --ns clock low t 3 cc 0.35 x t 1min --ns hold time t 4 cc 0 - - ns clock rise time t 5 cc - - 0.15 x t 1min ns scl sda scl sda t 1 t 2 t 1 t 2 t 10 t 9 t 7 t 8 t 7 t 3 t 4 t 5 t 6 ps sr s 70% 30 % 9 th clock 9 th clock subject to agreement on the use of product information XMC1200 xmc1000 family electrical parameter data sheet 56 v1.4, 2014-05 figure 19 usic iis master transmitter timing figure 20 usic iis slave receiver timing table 30 usic iis slave receiver timing parameter symbol values unit note / test condition min. typ. max. clock period t 6 sr 4/ f mclk --ns clock high t 7 sr 0.35 x t 6min --ns clock low t 8 sr 0.35 x t 6min --ns set-up time t 9 sr 0.2 x t 6min --ns hold time t 10 sr 10 - - ns sck wa/ dout t 1 t 5 t 3 t 2 t 4 sck wa/ din t 6 t 10 t 8 t 7 t 9 subject to agreement on the use of product information XMC1200 xmc1000 family package and reliability data sheet 57 v1.4, 2014-05 4 package and reliability the XMC1200 is a member of the xmc1000 deri vatives of microcontrollers. it is also compatible to a certain extent with me mbers of similar families or subfamilies. each package is optimized for the device it houses. therefore, there may be slight differences between packages of the same pi n-count but for different device types. in particular, the size of the exposed die pad may vary. if different device types are considered or planned for an applicati on, it must be ensured that the board layout fits all packages under consideration. 4.1 package parameters table 31 provides the thermal characteristi cs of the packages used in XMC1200. note: for electrical reasons, it is required to connect the exposed pad to the board ground v ssp , independent of emc and thermal requirements. 4.1.1 thermal considerations when operating the XMC1200 in a system, the to tal heat generated in the chip must be dissipated to the ambient environment to pr event overheating and the resulting thermal damage. the maximum heat that can be dissipated dep ends on the package and its integration into the target board. the ?thermal resistance r table 31 thermal characteristics of the packages parameter symbol limit values unit package types min. max. exposed die pad dimensions ex r subject to agreement on the use of product information XMC1200 xmc1000 family package and reliability data sheet 58 v1.4, 2014-05 the difference between junction temperature and ambient temperature is determined by p int + p iostat + p iodyn ) r p int = v ddp i ddp (switching current and leakage current). the static external power consumption caus ed by the output drivers is defined as p iostat = v ddp - v oh ) i oh ) + v ol i ol ) the dynamic external power consumpt ion caused by the output drivers ( p iodyn ) depends on the capacitive load connected to the resp ective pins and their switching frequencies. if the total power di ssipation for a given system configur ation exceeds the defined limit, countermeasures must be taken to ensure proper system operation: ? reduce v ddp , if possible in the system ? reduce the system frequency ? reduce the number of output pins ? reduce the load on active output drivers subject to agreement on the use of product information XMC1200 xmc1000 family package and reliability data sheet 59 v1.4, 2014-05 4.2 package outlines figure 21 pg-tssop-38-9 subject to agreement on the use of product information XMC1200 xmc1000 family package and reliability data sheet 60 v1.4, 2014-05 figure 22 pg-tssop-28-16 subject to agreement on the use of product information XMC1200 xmc1000 family package and reliability data sheet 61 v1.4, 2014-05 figure 23 pg-tssop-16-8 subject to agreement on the use of product information XMC1200 xmc1000 family package and reliability data sheet 62 v1.4, 2014-05 figure 24 pg-vqfn-24-19 subject to agreement on the use of product information XMC1200 xmc1000 family package and reliability data sheet 63 v1.4, 2014-05 figure 25 pg-vqfn-40-13 all dimensions in mm. subject to agreement on the use of product information XMC1200 xmc1000 family quality declaration data sheet 64 v1.4, 2014-05 5 quality declaration table 32 shows the characteristics of the quality parameters in the XMC1200. table 32 quality parameters parameter symbol limit values unit notes min. max. esd susceptibility according to human body model (hbm) v hbm sr - 2000 v conforming to eia/jesd22- a114-b esd susceptibility according to charged device model (cdm) pins v cdm sr - 500 v conforming to jesd22-c101-c moisture sensitivity level msl cc - 3 - jedec j-std-020c subject to agreement on the use of product information www.infineon.com published by infineon technologies ag |
Price & Availability of XMC1200
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |